Why Does Replacing a 32-bit Loop Counter with 64-bit Cause Performance Degradation with `_mm_popcnt_u64` on Intel CPUs?

Replacing a 32-bit loop counter with 64-bit introduces crazy performance deviations with mm_popcnt_u64 on Intel CPUs

Summary

The article investigates a performance deviation encountered when replacing a 32-bit loop counter with a 64-bit counter in a performance-critical loop using the _mm_popcnt_u64 intrinsic. The issue caused a significant drop in performance on Intel CPUs, leading to different execution speeds. The author explores the reasons behind this behavior and offers potential solutions.

Details

The code in question involves a loop that iterates over an array of data and performs a popcount operation using the x86 intrinsic instruction. The loop counter variable was initially an unsigned integer, but replacing it with a 64-bit unsigned integer (uint64_t) resulted in a performance drop of around 50%.

To investigate the cause, the author compiled the code with various optimization flags and analyzed the resulting assembly code. They observed that different assembly was generated for the 32-bit and 64-bit versions, leading them to suspect a compiler bug.

However, after testing the code with different compilers, the author concluded that the problem was not caused by a compiler bug but rather by a false data dependency in the hardware. The _mm_popcnt_u64 instruction, when used on Intel Sandy/Ivy Bridge and Haswell processors, exhibits a false dependency on the destination register, where the instruction waits until the destination is ready before executing. This false dependency can carry across loop iterations, preventing the processor from parallelizing different iterations and leading to a performance loss.

The author presents inline assembly tests that demonstrate the performance differences by isolating the popcount operation and breaking the false dependency chain. These tests show that the false dependency has a significant impact on performance, resulting in a speed reduction from 18.6195 GB/s to 8.49272 GB/s.

The article also highlights that the issue affects Intel CPUs, while AMD processors do not appear to have this false dependency.

Solutions

To mitigate this performance issue, the author suggests several solutions:

• Use a 32-bit loop counter instead of a 64-bit counter for this specific loop.
• If using a 64-bit loop counter is necessary, break the false dependency chain by explicitly zeroing the destination register before using it in the popcount operation.
• Use a compiler that is aware of this false dependency and generates code to compensate for it.

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