Carry Propagation Issue in mpfl Addition
Your mpfl addition function encounters an issue with propagating the carry value correctly, resulting in an incorrect sum. Specifically, after adding two 32-bit values, if the result exceeds the range of a single 32-bit value, the carry bit is not propagated properly, leading to an incorrect sum.
Architectural Approach
To resolve this issue, it's beneficial to consider an ALU (Arithmetic Logic Unit) architecture similar to those used in hardware implementations. By modeling your code after the operation of an ALU, you can simplify and improve the accuracy of your calculations.
Correcting the Code
The following code provides a revised version of your addition function that addresses the carry propagation issue:
mpfl operator+(const mpfl &lhs, const mpfl &rhs) { unsigned long i; mpfl ret(0); mpfl trhs(rhs); ALU32 alu; for (i = lhs.nbytes; i >= 0; i--) { alu.adc(ret.data[i].data, lhs.data[i].data, trhs.data[i].data); if (i < lhs.nbytes) { if (ret.data[i].data == 255 && ret.data[i + 1].carry == 1) increment(&trhs, i + 1); } } return ret; }
Key Modifications
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