What is Intel Architecture Code Analyzer (IACA) and How Do I Use It for Instruction Scheduling Analysis?

What is IACA and how do I use it?

IACA (the Intel Architecture Code Analyzer) is a static analysis tool that calculates the scheduling of instructions when executed by modern Intel processors. It allows for throughput, latency and trace analysis of code snippets under optimal execution conditions.

How to use it:

To use IACA, you need to inject start and end markers into the code you want to analyze. This can be done using the provided iacaMarks.h header in C/C or manually in x86 assembly.

In C/C :

while(cond){
    IACA_START
    /* Loop body */
    /* ... */
}
IACA_END

In assembly (x86):

    mov ebx, 111          ; Start marker bytes
    db 0x64, 0x67, 0x90   ; Start marker bytes

.innermostlooplabel:
    ; Loop body
    ; ...
    jne .innermostlooplabel ; Conditional branch backwards to top of loop

    mov ebx, 222          ; End marker bytes
    db 0x64, 0x67, 0x90   ; End marker bytes

Analysis command:

Once the markers are injected, rebuild the code and analyze it using the IACA command-line tool. The syntax is as follows:

iaca.sh -64 -arch HSW -graph insndeps.dot foo

This command analyzes the 64-bit binary foo on the Haswell architecture and generates a graph of the instruction dependencies.

Limitations:

• IACA does not support a certain few instructions.
• It only supports Nehalem and newer processors.
• It does not support non-innermost loops in throughput mode.

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