How to Create a Simple C Makefile for Compilation and Linking?

How to Make a SIMPLE C Makefile

Introduction

Creating a Makefile is necessary for compiling and executing a C project. This article provides an introduction to Make and a step-by-step guide on creating a simple Makefile.

Understanding Make

Make is a build dependency manager that orchestrates the order in which commands need to be executed to compile and link your C source files into an executable.

Setting Up the Makefile

For this example, we assume you have a single C file named a3driver.cpp and an imported class in /user/cse232/Examples/example32.sequence.cpp.

Building Blocks of a Makefile

Variables: Make variables allow you to store information like compiler flags and libraries. Example:

CPPFLAGS=-g -pthread -I/sw/include/root

Target and Dependency Lines: Target lines specify the output to be generated, while dependency lines list the files required to create the target. Example:

tool: tool.o support.o
    g++ $(LDFLAGS) -o tool tool.o support.o $(LDLIBS)

tool.o: tool.cc support.hh
    g++ $(CPPFLAGS) -c tool.cc

Sample Makefile

Below is a simple Makefile for your specific requirements:

CPPFLAGS=-g
LDFLAGS=-g
LDLIBS=-L/usr/lib/-llua5.2
SRCS=a3driver.cpp /user/cse232/Examples/example32.sequence.cpp
OBJS=$(SRCS:.cpp=.o)

all: a3driver

a3driver: $(OBJS)
    $(CXX) $(LDFLAGS) -o a3driver $(OBJS) $(LDLIBS)

.PHONY: clean
clean:
    rm -f $(OBJS) a3driver

Explanation

• CPPFLAGS and LDFLAGS set the necessary compilation and linking flags.
• SRCS defines the source files, and OBJS generates the corresponding object files.
• all is the default target, and a3driver is the executable.
• The clean target removes object files and the executable.

Conclusion

This sample Makefile should allow you to compile and execute your C project using the specified external class. Remember, Makefiles are customizable, so feel free to expand and modify them according to your needs.

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