Can Modern x86 CPUs Really Not Store Single Bytes to Memory?

Can Modern x86 Hardware Not Store a Single Byte to Memory?

The Question:

According to Bjarne Stroustrup's description of C 's memory model, modern hardware cannot perform load or store operations involving data smaller than a word. However, the author's testing with x86 processors demonstrates that they can indeed store single-byte objects.

The Answer:

Modern Instruction Set Architectures (ISAs), including x86, provide instructions for performing byte-sized stores. These instructions are atomic and do not affect neighboring bytes.

Internally, some non-x86 CPUs may implement byte stores using an RMW cycle, modifying an entire word in the cache line. However, this is not exposed to the programmer and does not affect the correctness of external stores.

Stroustrup's Statement

Stroustrup's statement that modern hardware cannot process data smaller than a word is an inaccurate generalization. Modern CPUs can indeed load and store bytes efficiently.

Internal RMW vs. External Visibility

Some high-performance CPUs may use an RMW cycle to implement byte stores in their caches. However, this is an internal implementation detail that does not impact the externally visible behavior of the stores. Byte stores are still atomic and do not disturb neighboring bytes.

Memory Models and ISA Design

The C memory model guarantees that threads can safely access and update separate memory locations without interference. The implementation of this guarantee is left to the compiler and hardware combination.

Modern CPUs and memory controllers have mechanisms to ensure that byte stores behave atomically and correctly. They employ techniques such as cache coherence protocols and dedicated memory controller signals to handle byte-sized transfers.

Performance Considerations

While modern CPUs can handle byte stores efficiently, it is important to note that certain architectures or specific scenarios may lead to performance penalties. For example, unaligned byte stores or I/O-related writes may incur extra overhead.

Conclusion

The claim that modern hardware cannot perform byte-sized stores is inaccurate. Mainstream CPUs and ISAs have been providing this functionality for decades, ensuring that byte-related operations are efficiently and safely executed. The C memory model relies on these architectural capabilities to guarantee correctness and enable high-performance software.

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