Cache (English: cache, /kæʃ/ kash) is referred to as cache. The original meaning refers to a kind of RAM whose access speed is faster than that of general random access memory (RAM). Usually it does not use DRAM technology like system main memory. , instead using expensive but faster SRAM technology.
#Cache refers to a memory that can perform high-speed data exchange. It exchanges data with the CPU before the memory, so the speed is very fast.
L1 Cache (Level 1 Cache) is the first level cache of the CPU. The capacity and structure of the built-in L1 cache have a greater impact on the performance of the CPU. However, the cache memory is composed of static RAM and has a complicated structure. When the CPU die area cannot be too large, the capacity of the L1 cache is not sufficient. Probably made too big. Generally, the capacity of L1 cache is usually 32-256KB.
L2 Cache (Level 2 Cache) is the second-level cache of the CPU, which is divided into internal and external chips. The internal on-chip L2 cache runs at the same speed as the main frequency, while the external L2 cache only runs at half the main frequency. The L2 cache capacity will also affect the performance of the CPU. The principle is that the bigger the better. The L2 cache of ordinary desktop CPUs is generally 128KB to 2MB or higher. The L2 cache of CPUs used in notebooks, servers and workstations can be up to 1MB- 3MB.
The cache is only a copy of a small amount of data in the memory, so when the CPU looks for data in the cache, it may not be found (because the data is not copied from the memory to the cache). At this time The CPU will still go to the memory to find data, which will slow down the system, but the CPU will copy the data to the cache so that it does not have to be retrieved from the memory next time.
As time changes, the most frequently accessed data does not remain unchanged. That is to say, the data that was not frequent just now needs to be accessed frequently now, and it was still the most frequently accessed data just now. It is not frequent anymore, so the data in the cache must be replaced frequently according to a certain algorithm, so as to ensure that the data in the cache is accessed most frequently.
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