FPGA is an integrated chip mainly composed of digital circuits, which is a type of programmable logic device (PLD); FPGA is a type and a half in the field of application-specific integrated circuits (ASIC). The emergence of customized circuits not only solves the shortcomings of customized circuits, but also overcomes the shortcomings of the limited number of gates in the original programmable devices.
The operating environment of this tutorial: Windows 7 system, Dell G3 computer.
FPGA (Field Programmable Gate Array) is the basis of programmable devices such as PAL (Programmable Array Logic) and GAL (General Array Logic) product of further development. It appears as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of gates in the original programmable devices.
FPGA is essentially a kind of chip, an integrated chip mainly composed of digital circuits.
FPGA was invented in 1985 by Ross Freeman, one of the founders of Xilinx. It is a type of programmable logic device (PLD). This time is about 20 years later than the emergence of the famous Moore's Law, but once FPGA was invented, the subsequent development speed was faster than most people imagined.
Figure 1 shows the physical picture of the FPGA chip:
Figure 1 The physical picture of the FPGA chip
Before the invention of PLD, engineers used discrete logic chips containing several logic gates to build circuit systems. It was difficult to implement complex logic functions.
In order to solve this problem, in the 1970s, the Programmable Logic Array (PLA) came out. The PLA contains a fixed number of AND gates and NOT gates, which form the "AND plane" respectively. ” and “or plane”, that is, “AND connection matrix” and “OR connection matrix”, and the connection matrix that can only be programmed once (because the programming here is based on fuse technology), so some relatively complex AND, or the logical function of multiple expressions, the internal structure of PLA is shown in Figure 2:
Also came out at the same time as PLA is programmable Programmable Read-Only Memory (PROM), its internal structure is shown in Figure 3. Like PLA, PROM contains an "AND connection matrix" and an "OR connection matrix" internally, but the connection matrix of the AND gate is fixed in hardware, and only the connection matrix of the OR gate is programmable.
If only the connection matrix of the AND gate is programmable, and the connection matrix of the OR gate is fixed by hardware, then this The chip is called Programmable Array Logic (PAL). According to the different working modes of the output circuit, PAL can be divided into three-state output, register output, and complementary output. However, PAL still uses the fuse process and can only be programmed once. . The structure diagram of PAL is shown in Figure 4.
On the basis of PAL, a general array logic device (Generic Array Logic, GAL) has been developed. Compared with Compared with PAL, GAL has two improvements:
The structure diagram of GAL is shown in Figure 5:
The early PLD was mainly composed of The above four types of chips are composed of PROM, PLA, PAL and GAL. Their common feature is that they can implement logic functions with good speed characteristics, but because their structures are too simple, they can only implement smaller digital circuits.
With the development of science and technology and the progress of society, people have higher and higher requirements for the integration of chips. Early PLD products could not meet people's needs, and Complex Programmable Logic Device (CPLD) was born. CPLD can be viewed as a continuation of the PLA device structure, and a CPLD device can also be viewed as a collection of several PLAs and a programmable connection matrix. The internal structure diagram of CPLD is shown in Figure 6.
FPGA came out a few years earlier than CPLD, and is called a high-density programmable logic device together with CPLD, but they are essentially different. The internal architecture of the FPGA chip does not follow a structure similar to PLA, but adopts the concept of Logic Cell Array (LCA), which changes the idea of using a large number of AND gates and NOT gates in PLD devices in the past, mainly using lookup tables. and registers.
In addition, FPGA and CPLD also have differences in resource type, speed, etc., as shown in the table below.
Device types/characteristics | FPGA | CPLD |
---|---|---|
Internal structure | Look Up Table | Product Term |
Program storage | Internal SRAM structure, external EEPROM or Flash storage program | Internal EEPROM or Flash |
Resource type | Rich trigger resources | Rich combinational logic resources |
Integration degree | High | Low |
Use occasions | Complete more complex algorithms | Complete control logic |
Fast | Slow | |
RAM, PLL, DSP, etc. | —— | |
Generally cannot be kept secret (encryption core can be used) | Can be encrypted |
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