Intel reveals node evolution version performance indicators: each PPA increase does not exceed 10%

IT House News on February 22, Intel revealed the performance indicators of its future node evolution versions at the IFS Direct Connect event: each PPA improvement will not exceed 10%.

IT Home Note: PPA stands for Power/Performance/Area. Power consumption, performance, and area (logic density) are used as a whole as the performance criterion for advanced processes.

Intel has confirmed that it will launch evolutionary versions in the future and will use the "P", "T" and "E" suffixes to distinguish these versions, which stand for "performance improvement" and "through silicon vias for 3D stacking" respectively. Technology” and “Functional Expansion”. This move will provide users with more choices to meet different needs.

▲Intel Foundry: Process Roadmap

Anandtech reports that the performance per watt of the "P" evolution version is improved by 5-10%; on the "E" evolution version where Intel introduces new features, there will also be a certain degree of improvement, but the magnitude will not exceed 5%.

Anandtech also mentioned that For improvements above 10% in performance per watt, Intel will use separate major process nodes to call them.

According to a report by Andreas Schilling, editor of German media HardwareLuxx, Intel CEO Pat Gelsinger said that future "P" and "E" evolutionary versions will be in the power performance area (PPA) Improved by more than 5%. In addition, for Intel's major process nodes of 7nm, 4nm, 3nm, 20A and 18A, the PPA improvement at each step will reach 14% to 15%.

Based on information from previous reports by foreign media Anandtech and technology blog More Than Moore, TSMC’s recent evolution node improvements also fall roughly at this level. The relevant information is compiled as follows for reference (? means unknown, - means unchanged):

##N5->N5PN5->N5HPCN4->N4PN4P->N4XN3->N3EPower consumption (reduction)10%? -? ? Performance (improvement)5%7%6%≥4%5%Area (reduced)--- ? -In addition to these conventional process nodes, Intel will also provide customers with richer choices: Stu Pann, Intel Foundry Leader ) In an interview with foreign media Tom's Hardware on the eve of the IFS Direct Connect event, he expressed his willingness to work with EDA partners to

develop customized nodes similar to NVIDIA 4N (based on TSMC's 5nm process) for customers.

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